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Quantron motorbrückenpatch oldsvn r2782 motorbrücke pmux diff
Posted by Anonymous on Fri 30th Nov 2018 15:26
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modification of post by Anonymous (view diff)

  1. Index: /home/rmainz/tmp/svneckelmanngroup_search/max/quantron_a/trunk/src/ltib_custom/pkgs/u-boot-2009.08-1330436059.patch
  2. ===================================================================
  3. --- /home/rmainz/tmp/svneckelmanngroup_search/max/quantron_a/trunk/src/ltib_custom/pkgs/u-boot-2009.08-1330436059.patch (Revision 0)
  4. +++ /home/rmainz/tmp/svneckelmanngroup_search/max/quantron_a/trunk/src/ltib_custom/pkgs/u-boot-2009.08-1330436059.patch (Revision 2782)
  5. @@ -0,0 +1,57 @@
  6. +diff --exclude CVS --exclude .git -uNr u-boot-2009.08/board/freescale/quantron_a/quantron_a.c u-boot-2009.08.modified/board/freescale/quantron_a/quantron_a.c
  7. +--- u-boot-2009.08/board/freescale/quantron_a/quantron_a.c     2012-02-28 14:34:25.000000000 +0100
  8. ++++ u-boot-2009.08.modified/board/freescale/quantron_a/quantron_a.c    2012-02-28 14:26:18.000000000 +0100
  9. +@@ -168,6 +168,45 @@
  10. + int board_init(void)
  11. + {
  12. +       setup_soc_rev();
  13. ++
  14. ++         mxc_iomux_set_pad(MX25_PIN_PWM, PAD_CTL_PKE_ENABLE |
  15. ++              PAD_CTL_PUE_PUD | PAD_CTL_100K_PD);
  16. ++
  17. ++
  18. ++         mxc_iomux_set_pad(MX25_PIN_PWM, PAD_CTL_PKE_ENABLE |
  19. ++              PAD_CTL_PUE_PUD | PAD_CTL_100K_PD);
  20. ++
  21. ++         mxc_request_iomux(MX25_PIN_CSI_HSYNC, MUX_CONFIG_ALT5);
  22. ++         mxc_iomux_set_pad(MX25_PIN_CSI_HSYNC, PAD_CTL_PKE_ENABLE |
  23. ++                                PAD_CTL_PUE_PUD | PAD_CTL_100K_PD);
  24. ++       mxc_set_gpio_dataout(MX25_PIN_CSI_HSYNC, 0);
  25. ++
  26. ++         mxc_request_iomux(MX25_PIN_CSPI1_RDY, MUX_CONFIG_ALT5);
  27. ++         mxc_iomux_set_pad(MX25_PIN_CSPI1_RDY, PAD_CTL_PKE_ENABLE |
  28. ++                                PAD_CTL_PUE_PUD | PAD_CTL_100K_PD);
  29. ++       mxc_set_gpio_dataout(MX25_PIN_CSPI1_RDY, 0);
  30. ++
  31. ++         mxc_request_iomux(MX25_PIN_UART2_CTS, MUX_CONFIG_ALT5);
  32. ++         mxc_iomux_set_pad(MX25_PIN_UART2_CTS, PAD_CTL_PKE_ENABLE |
  33. ++                                PAD_CTL_PUE_PUD | PAD_CTL_100K_PD);
  34. ++       mxc_set_gpio_direction(MX25_PIN_UART2_CTS, 0);           /* Als Ausgang definieren */
  35. ++       mxc_set_gpio_dataout(MX25_PIN_UART2_CTS, 0);
  36. ++
  37. ++         mxc_request_iomux(MX25_PIN_CSI_MCLK, MUX_CONFIG_ALT5);
  38. ++         mxc_iomux_set_pad(MX25_PIN_CSI_MCLK, PAD_CTL_PKE_ENABLE |
  39. ++                                PAD_CTL_PUE_PUD | PAD_CTL_100K_PD);
  40. ++      mxc_set_gpio_dataout(MX25_PIN_CSI_MCLK, 0);
  41. ++
  42. ++         mxc_request_iomux(MX25_PIN_CSI_VSYNC, MUX_CONFIG_ALT5);
  43. ++         mxc_iomux_set_pad(MX25_PIN_CSI_VSYNC, PAD_CTL_PKE_ENABLE |
  44. ++                                PAD_CTL_PUE_PUD | PAD_CTL_100K_PD);
  45. ++      mxc_set_gpio_dataout(MX25_PIN_CSI_VSYNC, 0);
  46. ++
  47. ++         mxc_request_iomux(MX25_PIN_CSI_D8, MUX_CONFIG_ALT5);
  48. ++         mxc_iomux_set_pad(MX25_PIN_CSI_D8, PAD_CTL_PKE_ENABLE |
  49. ++                                PAD_CTL_PUE_PUD | PAD_CTL_100K_PD);
  50. ++      mxc_set_gpio_dataout(MX25_PIN_CSI_D8, 0);

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