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Heuhaufen flexcan problem i.mx25
Posted by Anonymous on Fri 4th Jan 2019 08:20
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view followups (newest first): Heuhaufen flexcan problem i.mx25 by Anonymous

  1. 138c138,139
  2. < #define FLEXCAN_TX_MB_RESERVED_OFF_FIFO               8
  3. ---
  4. > #define FLEXCAN_TX_MB_RESERVED_OFF_FIFO       8
  5. > #define FLEXCAN_TX_MB_OFF_FIFO                9
  6. 140,143c141,144
  7. < #define FLEXCAN_TX_MB                         63
  8. < #define FLEXCAN_RX_MB_OFF_TIMESTAMP_FIRST     (FLEXCAN_TX_MB_RESERVED_OFF_TIMESTAMP + 1)
  9. < #define FLEXCAN_RX_MB_OFF_TIMESTAMP_LAST      (FLEXCAN_TX_MB - 1)
  10. < #define FLEXCAN_IFLAG_MB(x)           BIT(x & 0x1f)
  11. ---
  12. > #define FLEXCAN_TX_MB_OFF_TIMESTAMP           1
  13. > #define FLEXCAN_RX_MB_OFF_TIMESTAMP_FIRST     (FLEXCAN_TX_MB_OFF_TIMESTAMP + 1)
  14. > #define FLEXCAN_RX_MB_OFF_TIMESTAMP_LAST      63
  15. > #define FLEXCAN_IFLAG_MB(x)           BIT(x)
  16. 260a262
  17. >       struct flexcan_mb __iomem *tx_mb;
  18. 261a264
  19. >       u8 tx_mb_idx;
  20. 515d517
  21. <       struct flexcan_regs __iomem *regs = priv->regs;
  22. 538c540
  23. <               priv->write(data, &regs->mb[FLEXCAN_TX_MB].data[0]);
  24. ---
  25. >               priv->write(data, &priv->tx_mb->data[0]);
  26. 542c544
  27. <               priv->write(data, &regs->mb[FLEXCAN_TX_MB].data[1]);
  28. ---
  29. >               priv->write(data, &priv->tx_mb->data[1]);
  30. 547,548c549,550
  31. <       priv->write(can_id, &regs->mb[FLEXCAN_TX_MB].can_id);
  32. <       priv->write(ctrl, &regs->mb[FLEXCAN_TX_MB].can_ctrl);
  33. ---
  34. >       priv->write(can_id, &priv->tx_mb->can_id);
  35. >       priv->write(ctrl, &priv->tx_mb->can_ctrl);
  36. 564d565
  37. <       struct flexcan_regs __iomem *regs = priv->regs;
  38. 568,570d568
  39. <       u32 timestamp;
  40. <
  41. <       timestamp = priv->read(&regs->timer) << 16;
  42. 617c615
  43. <       can_rx_offload_queue_sorted(&priv->offload, skb, timestamp);
  44. ---
  45. >       can_rx_offload_irq_queue_err_skb(&priv->offload, skb);
  46. 623d620
  47. <       struct flexcan_regs __iomem *regs = priv->regs;
  48. 629,631d625
  49. <       u32 timestamp;
  50. <
  51. <       timestamp = priv->read(&regs->timer) << 16;
  52. 661c655
  53. <       can_rx_offload_queue_sorted(&priv->offload, skb, timestamp);
  54. ---
  55. >       can_rx_offload_irq_queue_err_skb(&priv->offload, skb);
  56. 728a723
  57. >               priv->read(&regs->timer);
  58. 731,736d725
  59. <       /* Read the Free Running Timer. It is optional but recommended
  60. <        * to unlock Mailbox as soon as possible and make it available
  61. <        * for reception.
  62. <        */
  63. <       priv->read(&regs->timer);
  64. <
  65. 746,748c735,737
  66. <       iflag2 = priv->read(&regs->iflag2) & priv->reg_imask2_default &
  67. <               ~FLEXCAN_IFLAG_MB(FLEXCAN_TX_MB);
  68. <       iflag1 = priv->read(&regs->iflag1) & priv->reg_imask1_default;
  69. ---
  70. >       iflag2 = priv->read(&regs->iflag2) & priv->reg_imask2_default;
  71. >       iflag1 = priv->read(&regs->iflag1) & priv->reg_imask1_default &
  72. >               ~FLEXCAN_IFLAG_MB(priv->tx_mb_idx);
  73. 760c749
  74. <       u32 reg_iflag2, reg_esr;
  75. ---
  76. >       u32 reg_iflag1, reg_esr;
  77. 762a752,753
  78. >       reg_iflag1 = priv->read(&regs->iflag1);
  79. >
  80. 776,778d766
  81. <               u32 reg_iflag1;
  82. <
  83. <               reg_iflag1 = priv->read(&regs->iflag1);
  84. 794,795d781
  85. <       reg_iflag2 = priv->read(&regs->iflag2);
  86. <
  87. 797,799c783
  88. <       if (reg_iflag2 & FLEXCAN_IFLAG_MB(FLEXCAN_TX_MB)) {
  89. <               u32 reg_ctrl = priv->read(&regs->mb[FLEXCAN_TX_MB].can_ctrl);
  90. <
  91. ---
  92. >       if (reg_iflag1 & FLEXCAN_IFLAG_MB(priv->tx_mb_idx)) {
  93. 801,802c785
  94. <               stats->tx_bytes += can_rx_offload_get_echo_skb(&priv->offload,
  95. <                                                              0, reg_ctrl << 16);
  96. ---
  97. >               stats->tx_bytes += can_get_echo_skb(dev, 0);
  98. 808,809c791,792
  99. <                           &regs->mb[FLEXCAN_TX_MB].can_ctrl);
  100. <               priv->write(FLEXCAN_IFLAG_MB(FLEXCAN_TX_MB), &regs->iflag2);
  101. ---
  102. >                           &priv->tx_mb->can_ctrl);
  103. >               priv->write(FLEXCAN_IFLAG_MB(priv->tx_mb_idx), &regs->iflag1);
  104. 951c934
  105. <               FLEXCAN_MCR_IDAM_C | FLEXCAN_MCR_MAXMB(FLEXCAN_TX_MB);
  106. ---
  107. >               FLEXCAN_MCR_IDAM_C;
  108. 953c936
  109. <       if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP)
  110. ---
  111. >       if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP) {
  112. 955,957c938,942
  113. <       else
  114. <               reg_mcr |= FLEXCAN_MCR_FEN;
  115. <
  116. ---
  117. >               reg_mcr |= FLEXCAN_MCR_MAXMB(priv->offload.mb_last);
  118. >       } else {
  119. >               reg_mcr |= FLEXCAN_MCR_FEN |
  120. >                       FLEXCAN_MCR_MAXMB(priv->tx_mb_idx);
  121. >       }
  122. 999a985,990
  123. >       /* clear and invalidate all mailboxes first */
  124. >       for (i = priv->tx_mb_idx; i < ARRAY_SIZE(regs->mb); i++) {
  125. >               priv->write(FLEXCAN_MB_CODE_RX_INACTIVE,
  126. >                           &regs->mb[i].can_ctrl);
  127. >       }
  128. >
  129. 1001c992
  130. <               for (i = priv->offload.mb_first; i <= priv->offload.mb_last; i++) {
  131. ---
  132. >               for (i = priv->offload.mb_first; i <= priv->offload.mb_last; i++)
  133. 1004,1010d994
  134. <               }
  135. <       } else {
  136. <               /* clear and invalidate unused mailboxes first */
  137. <               for (i = FLEXCAN_TX_MB_RESERVED_OFF_FIFO; i <= ARRAY_SIZE(regs->mb); i++) {
  138. <                       priv->write(FLEXCAN_MB_CODE_RX_INACTIVE,
  139. <                                   &regs->mb[i].can_ctrl);
  140. <               }
  141. 1019c1003
  142. <                   &regs->mb[FLEXCAN_TX_MB].can_ctrl);
  143. ---
  144. >                   &priv->tx_mb->can_ctrl);
  145. 1374c1358,1359
  146. <       if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP)
  147. ---
  148. >       if (priv->devtype_data->quirks & FLEXCAN_QUIRK_USE_OFF_TIMESTAMP) {
  149. >               priv->tx_mb_idx = FLEXCAN_TX_MB_OFF_TIMESTAMP;
  150. 1376c1361,1362
  151. <       else
  152. ---
  153. >       } else {
  154. >               priv->tx_mb_idx = FLEXCAN_TX_MB_OFF_FIFO;
  155. 1377a1364,1365
  156. >       }
  157. >       priv->tx_mb = &regs->mb[priv->tx_mb_idx];
  158. 1379,1380c1367,1368
  159. <       priv->reg_imask1_default = 0;
  160. <       priv->reg_imask2_default = FLEXCAN_IFLAG_MB(FLEXCAN_TX_MB);
  161. ---
  162. >       priv->reg_imask1_default = FLEXCAN_IFLAG_MB(priv->tx_mb_idx);
  163. >       priv->reg_imask2_default = 0;

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