+/dts-v1/; +#include +#include +#include "imx25.dtsi" + +/ { + model = "Eckelmann AG ECU01"; + compatible = "eckelmann,ecu01", "eckelmann,imx25", "fsl,imx25"; + + chosen { + linux,stdout-path = &uart5; + + environment@0 { + compatible = "barebox,environment"; + device-path = &nfc, "partname:environment"; + }; + }; + + memory { + reg = <0x80000000 0x8000000>; + }; + + /*cmo_qvga: display { + model = "CMO-QVGA"; + bits-per-pixel = <16>; + fsl,pcr = <0xcad08b80>; + bus-width = <18>; + native-mode = <&qvga_timings>; + display-timings { + qvga_timings: 320x240 { + clock-frequency = <6500000>; + hactive = <320>; + vactive = <240>; + hback-porch = <30>; + hfront-porch = <38>; + vback-porch = <20>; + vfront-porch = <3>; + hsync-len = <15>; + vsync-len = <4>; + }; + }; + };*/ +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + ecu01 { + pinctrl_can1: can1 { + fsl,pins = < + MX25_PAD_GPIO_A__CAN1_TX 0x80000000 + MX25_PAD_GPIO_B__CAN1_RX 0x80000000 + >; + }; + + pinctrl_fec: fec { + fsl,pins = < + MX25_PAD_FEC_MDC__FEC_MDC 0x80000000 + MX25_PAD_FEC_MDIO__FEC_MDIO 0x80000000 + MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000 + MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000 + MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 + MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000 + MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x80000000 + MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000 + MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x80000000 + >; + }; + + pinctrl_nfc: nfc { + fsl,pins = < + MX25_PAD_NFRB__NFRB 0x80000000 + MX25_PAD_NFWP_B__NFWP_B 0x80000000 + MX25_PAD_NFRE_B__NFRE_B 0x80000000 + MX25_PAD_NFWE_B__NFWE_B 0x80000000 + MX25_PAD_NFALE__NFALE 0x80000000 + MX25_PAD_NFCLE__NFCLE 0x80000000 + MX25_PAD_NF_CE0__NF_CE0 0x80000000 + MX25_PAD_D0__D0 0x80000000 + MX25_PAD_D1__D1 0x80000000 + MX25_PAD_D2__D2 0x80000000 + MX25_PAD_D3__D3 0x80000000 + MX25_PAD_D4__D4 0x80000000 + MX25_PAD_D5__D5 0x80000000 + MX25_PAD_D6__D6 0x80000000 + MX25_PAD_D7__D7 0x80000000 + MX25_PAD_D8__D8 0x80000000 + MX25_PAD_D9__D9 0x80000000 + MX25_PAD_D10__D10 0x80000000 + MX25_PAD_D11__D11 0x80000000 + MX25_PAD_D12__D12 0x80000000 + MX25_PAD_D13__D13 0x80000000 + MX25_PAD_D14__D14 0x80000000 + MX25_PAD_D15__D15 0x80000000 + >; + }; + + pinctrl_pwm: pwm { + fsl,pins = < + MX25_PAD_PWM__PWM 0x80000000 //Motor0 + MX25_PAD_CSPI1_SS0__PWM2_PWMO 0x80000000 //Motor1 + >; + }; + + pinctrl_hog: hog { + fsl,pins = < + MX25_PAD_A14__GPIO_2_0 0x80000000 //SC_12V_S + MX25_PAD_A19__GPIO_2_5 0x80000000 //SC_3V3_S + MX25_PAD_A22__GPIO_2_8 0x80000000 //SC_8V2_S + + //Ausgänge + MX25_PAD_CSI_PIXCLK__GPIO_1_11 0x80000000 //Pieper + + MX25_PAD_CSI_HSYNC__GPIO_1_10 0x80000000 //ENA_1 + MX25_PAD_CSPI1_RDY__GPIO_2_22 0x80000000 //ENB_1 + MX25_PAD_UART2_CTS__GPIO_4_29 0x80000000 //ENA_2 + MX25_PAD_EXT_ARMCLK__GPIO_3_15 0x80000000 //ENB_2 + MX25_PAD_CSI_MCLK__GPIO_1_8 0x80000000 //CCW_1 + MX25_PAD_CSI_D8__GPIO_1_7 0x80000000 //CCW_2 + MX25_PAD_CLKO__GPIO_2_21 0x80000000 //CW_1 + MX25_PAD_CSI_VSYNC__GPIO_1_9 0x80000000 //CW_2 + + MX25_PAD_CSI_D6__GPIO_1_31 0x80000000 // LCD mirror (0) + MX25_PAD_CSI_D7__GPIO_1_6 0x80000000 // LCD rotate (1) + + //Eingänge + MX25_PAD_UART1_RXD__GPIO_4_22 0x80000000 //DIAGB_1 + MX25_PAD_SD1_DATA1__GPIO_2_26 0x80000000 //DIAGB_2 + MX25_PAD_UPLL_BYPCLK__GPIO_3_16 0x80000000 //DIAGA_1 + MX25_PAD_VSTBY_REQ__GPIO_3_17 0x80000000 //DIAGA_2 + + MX25_PAD_CSI_D9__GPIO_4_21 0x80000000 //Tast_1_in, Power Switch + MX25_PAD_POWER_FAIL__POWER_FAIL 0x80000000 //Shut_Down + + >; + }; + + pinctrl_uart2: uart2 { + fsl,pins = < + MX25_PAD_UART2_TXD__UART2_TXD 0x00000060 /* TXD */ + MX25_PAD_UART2_RXD__UART2_RXD 0x000000E0 /* RXD */ + >; + }; + + pinctrl_uart5: uart5 { + fsl,pins = < + MX25_PAD_CSI_D2__UART5_RXD 0x80000000 + MX25_PAD_CSI_D3__UART5_TXD 0x80000000 + MX25_PAD_CSI_D4__UART5_RTS 0x80000000 + MX25_PAD_CSI_D5__UART5_CTS 0x80000000 + >; + }; + + pinctrl_spi1: spi1 { + fsl,pins = < + MX25_PAD_CSPI1_MOSI__CSPI1_MOSI 0x000000a0 + MX25_PAD_CSPI1_MISO__CSPI1_MISO 0x000000a0 + MX25_PAD_CSPI1_SCLK__CSPI1_SCLK 0x000000a0 + + MX25_PAD_VSTBY_ACK__GPIO_3_18 0x80000000 /* CS1 */ + MX25_PAD_CSPI1_SS1__GPIO_1_17 0x80000000 /* CS2 */ + + >; + }; + + pinctrl_spi2: spi2 { + fsl,pins = < + MX25_PAD_SD1_CMD__CSPI2_MOSI 0x00000001 + MX25_PAD_SD1_CLK__CSPI2_MISO 0x00000001 + MX25_PAD_SD1_DATA0__CSPI2_SCLK 0x00000001 + MX25_PAD_SD1_DATA2__GPIO_2_27 0x80000000 /* CS1 */ + MX25_PAD_SD1_DATA3__GPIO_2_28 0x80000000 /* CS2 */ + >; + }; + + pinctrl_cc4: cc4 { + fsl,pins = < + MX25_PAD_CONTRAST__CC4 0x8000000 // CC_4 + >; + }; + + pinctrl_cc3: cc3 { + fsl,pins = < + MX25_PAD_UART1_RTS__CC3 0x8000000 // CC_3 + //MX25_PAD_UART1_RTS__GPIO_4_24 + >; + }; + + pinctrl_cc2: cc2 { + fsl,pins = < + MX25_PAD_GPIO_C__GPIO_C 0x8000000 // CC_2 + >; + }; + + pinctrl_cc1: cc1 { + fsl,pins = < + MX25_PAD_UART2_RTS__CC1 0x8000000 // CC_1 + //MX25_PAD_UART2_RTS__GPIO_4_28 + >; + }; + + pinctrl_i2c1: i2c1 { + fsl,pins = < + MX25_PAD_I2C1_CLK__I2C1_CLK 0x000000a8 + MX25_PAD_I2C1_DAT__I2C1_DAT 0x000000a8 + >; + }; + + pinctrl_lcdc: lcdc { + fsl,pins = < + MX25_PAD_LD0__LD0 0x1 + MX25_PAD_LD1__LD1 0x1 + MX25_PAD_LD2__LD2 0x1 + MX25_PAD_LD3__LD3 0x1 + MX25_PAD_LD4__LD4 0x1 + MX25_PAD_LD5__LD5 0x1 + MX25_PAD_LD6__LD6 0x1 + MX25_PAD_LD7__LD7 0x1 + MX25_PAD_LD8__LD8 0x1 + MX25_PAD_LD9__LD9 0x1 + MX25_PAD_LD10__LD10 0x1 + MX25_PAD_LD11__LD11 0x1 + MX25_PAD_LD12__LD12 0x1 + MX25_PAD_LD13__LD13 0x1 + MX25_PAD_LD14__LD14 0x1 + MX25_PAD_LD15__LD15 0x1 + MX25_PAD_GPIO_E__LD16 0x1 + MX25_PAD_GPIO_F__LD17 0x1 + MX25_PAD_HSYNC__HSYNC 0x80000000 + MX25_PAD_VSYNC__VSYNC 0x80000000 + MX25_PAD_LSCLK__LSCLK 0x80000000 + MX25_PAD_OE_ACD__OE_ACD 0x80000000 + >; + }; + + pinctrl_lcd_supply: lcd_supply { + fsl,pins = < + MX25_PAD_GPIO_D__GPIO_D 0x80000000 // LCD enable + >; + }; + + pinctrl_kpp: kpp { + fsl,pins = < + MX25_PAD_KPP_ROW0__KPP_ROW0 0x80000000 + MX25_PAD_KPP_ROW1__KPP_ROW1 0x80000000 + MX25_PAD_KPP_ROW2__KPP_ROW2 0x80000000 + MX25_PAD_KPP_ROW3__KPP_ROW3 0x80000000 + MX25_PAD_KPP_COL0__KPP_COL0 0x80000000 + MX25_PAD_KPP_COL1__KPP_COL1 0x80000000 + MX25_PAD_KPP_COL2__KPP_COL2 0x80000000 + MX25_PAD_KPP_COL3__KPP_COL3 0x80000000 + >; + }; + + pinctrl_usbotg: usbotg { + fsl,pins = < + MX25_PAD_UART1_TXD__GPIO_4_23 0x80000000 //OTG_PWR + //MX25_PAD_UART1_CTS__GPIO_4_25 0x80000000 //OTG_OC + >; + }; + + }; +};